mem[8|16|32|64][Zone:]Addr[,ngroups(in hex)
w1|w2|w4|w4 [Zone:]Addr[ xData …]
Zone Name of memory zone to access.
w4 10001080 01020304
mem32 10001080 4
10001080 = 01020304
mem 10001080 4
10001080 = 04 03 02 01 gawk!
mem16 10001080 2
10001080 = 0304 0102 (64 int16s)
w1 10001080 FF
Writing FF -> 10001080
mem32 10001080 1
10001080 = 010203FF GAWK!
w1 10001081 FE
Writing FE -> 10001081
mem 10001080 4
10001080 = FF FE 02 01
mem32 10001080 1
10001080 = 0102FEFF GAWK!!
w4 10001081 0a0b0c0d
Writing 0A0B0C0D -> 10001081
Mis-aligned memory write: Address: 0x10001081, NumBytes: 4, Alignment: 4 (Word-aligned)
mem32 10001080 4
10001080 = 0B0C0D03 FFFFFF0A FFFFFFFF F401F401
mem 10001080 16
10001080 = 03 0D 0C 0B 0A FF FF FF FF FF FF FF 01 F4 01 F4 ................
Get the address of a static global from the map. grep -A1 vbat ruuvitag_b/s132/armgcc/_build/ruuvi_firmware.map |\
sed "s/0x00000000\(........\)/mem16 \1,1/; s/ 0x2//"
.bss.vbat mem16 20004486,1 _build/ruuvi_firmware_main.c.o
mem16 20004486,1
20004486 = ADC Use: echo 'ibase=16;ADC' |bc to see 2780 millivolts)
mem32 1f000,40 Interrupt Service Routine table
0001F000 = 20010000 0003172D 00031755 00031757
0001F010 = 00031759 0003175B 0003175D 00000000
0001F020 = 00000000 00000000 00000000 0003175F
0001F030 = 00031761 00000000 00031763 00031765
0001F040 = 0002B451 00031767 00031767 0002BFD5
0001F050 = 00031767 00031101 0002B889 0002C3E5
0001F060 = 0002C06D 0002C135 0002C1FD 00031767
0001F070 = 00031767 0002BB51 00031767 00031767
0001F080 = 00023E95 00030005 00031767 00031767
0001F090 = 000300C9 00031767 0003165D 00031767
0001F0A0 = 00031767 00031767 0002C2C5 00030E45
0001F0B0 = 00031767 00031767 00000000 00000000
0001F0C0 = 00031767 00031767 00031767 00031767
0001F0D0 = 0002BC2D 00031767 00031767 00000000
0001F0E0 = 00000000 00000000 00000000 00000000
0001F0F0 = 00000000 00000000 00000000 00000000
mem64 2000,4 (4 64bit quad(?)words)
00002000 = D0032D1278A5BBBC E7B8DFFFD0042D13
00002010 = F7FFE001FF6FF7FF F006D1B12800FF55
w4 10001080 00010203 04050607 NRF_UICR->CUSTOMERWriting 00010203 -> 10001080
Writing 04050607 -> 10001084
mem32 10001080,20
10001080 = 00010203 04050607 FFFF0908 FFFFFFFF
10001090 = FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
…
100010FF = FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
Fill stack with C0FFEE:
w4 2000FA00 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FA40 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FA80 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FAC0 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FB00 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FB40 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FB80 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FBC0 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FC00 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FC40 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FC80 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FCC0 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FD00 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FD40 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FD80 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FDC0 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FE00 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FE40 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FE80 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FEC0 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FF00 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
w4 2000FF40 C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE C0FFEE
Display stack:
mem32 2000FC00,100 or less mem32 2000FF00,40
2000FF00 = 3A50D29F 00961AFE 00001903 0A040A02
2000FF10 = 75755209 61316976 00003639 00000000
2000FF20 = 00000006 00021E03 20002D9C 00000000
2000FF30 = 20002DAC 00000AF3 00000060 A801BE00
2000FF40 = 00000001 80000000 00000000 FFFFFFF9
2000FF50 = 00000614 21000018 01000001 40020518
2000FF60 = 00000001 80000000 00000000 00012639
2000FF70 = 0001263A 21000000 50000000 00020000
2000FF80 = 00080000 00003AFE 000000FE 000011DF
2000FF90 = 000242D1 0000001F 00000001 80000000
2000FFA0 = 50000000 00023727 00000021 00000039
2000FFB0 = 0000001A 00000096 8485C80E 2E3BBCEA
2000FFC0 = 12222139 12222139 00000FF8 00000002
2000FFD0 = 00000005 00000009 20002E0C 00000000
2000FFE0 = 00000000 20003B68 00000000 00000000
2000FFF0 = 00000000 20000000 00000000 0001F4AB
Data RAM System | Code RAM ICODE/DCODE
| 2000 F000 0080 F000
| mem 20000000,800 0800 0000
|
80..FC customer
mem 10001080,80 UICR
10000000 FICR:
14..7C Nordic Firmware NRFFW[0..11]
8 0000 .. 80 ffff, code ram
0000 .. 7 FFFF, flash
FICR->DEVICEID not MAC
mem 10000060,8
10000060 = 1A 04 D7 6E 04 BA FA D1
FICR->DEVICEADDRTYPE FE public, FF random
mem 100000a0,4
FICR->DEVICEADDR
mem 100000a4,6 displayed as MAC
1A 1E 4A 74 FA 37 ; F7:FA:74:4A:1E:1A
03 AD 43 C6 C0 B2 ; F2:C0:C6:43:AD:03
0E 23 6C 9C 8B 14 ; D4:8B:9C:6C:23:0E
BC 20 DD 3F 38 A9 ; E9:38:3F:DD:20:BC | | |
| Load data file | loadfile filename. bin | mot | hex | rec [,addr] for bin loadfile test_v3.28.13_full.hex
Downloading file [test_v3.28.13_full.hex]...
Comparing flash [100%] Done.
Erasing flash [100%] Done.
Programming flash [100%] Done.
Verifying flash [100%] Done.
J-Link: Flash download: Bank 0 @ 0x00000000: 3 ranges affected (319488 bytes)
J-Link: Flash download: Total time needed: 5.759s
(Prepare: 0.119s, Compare: 0.045s, Erase: 0.000s, Program: 5.492s, Verify: 0.015s, Restore: 0.086s)
O.K.
File is of unknown / supported format.
The file extension should be .hex or
Failed to open file.
File cannot be read or the file may have a checksum error or other format problem.
| Erase flash . | erase includes NRF_UICR->CUSTOMER Erasing device (nRF52832_xxAA)...
Comparing flash [100%] Done.
Erasing flash [100%] Done.
Verifying flash [100%] Done.
J-Link: Flash download: Total time needed: 0.312s
(Prepare: 0.042s, Compare: 0.000s, Erase: 0.263s, Program: 0.000s, Verify: 0.000s, Restore: 0.006s)
Erasing done.
mem64 0,10
00000000 = FFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFF
mem64 7FFE0,10
0007FFE0 = FFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFF
0007FFF0 = FFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFF
00080000 = 0000000000000000 0000000000000000
00080010 = 0000000000000000 0000000000000000
| Save memory
layout
see nrfjprog --readuicr file.hex
--readcode , --readram
| savebin filename, addr, NumBytes
in mem format i.e. 03 02 01 00 07 06 05 04
where mem32 shows 00010203 04050607
savebin 1a96hungRAM.bin 20000000 65535
Opening binary file for writing... [1a96hungRAM.bin]
Reading 415029 bytes from addr 0x20000000 into file...O.K.
q
> hexdump -C 1a96hungRAM.bin > 1a96hungRAM.txt
> vi 1a96hungRAM.txt
savebin FICRUICR.bin 10001000 8192
Opening binary file for writing... [FICRUICR.bin]
Reading 33170 bytes from addr 0x10001000 into file...O.K.
hexdump -C FICRUICR.bin > FICRUICR.txt
vi FICRUICR.txt
savebin FDS.bin
| Set Program Counter | SetPC Addr
Single step | s Instruction displayed has already been executed!
WatchDog timer WILL expire during step and WDOG_HANDLER will be invoked after entering g
J-Link>s
00024AFC: 4F F6 FF 72 MOVW R2, #0xFFFF
J-Link>regs
PC = 00024B00, CycleCnt = 014A8587
R0 = 00000000, R1 = 00000000, R2 = 0000FFFF, R3 = 00000000 …
0001F832: 01 38 SUBS R0, #1
J-Link>s
0001F834: C3 D1 BNE #-0x7A
J-Link>s
000008E4: 06 4B LDR R3, [PC, #+0x18]
…
0000031C: 4F F0 10 24 MOV R4, #0x10001000 Config area
00000320: A0 69 LDR R0, [R4, #+0x18]
00000322: 40 1C ADDS R0, R0, #1
00000324: 05 D0 BEQ #+0x0A
00000326: A5 69 LDR R5, [R4, #+0x18]
00000328: A6 69 LDR R6, [R4, #+0x18]
0000032A: 80 35 ADDS R5, #128
0000032C: 30 79 LDRB R0, [R6, #+0x04]
0000032E: AA 28 CMP R0, #170
00000330: 08 D0 BEQ #+0x10
00000332: 60 69 LDR R0, [R4, #+0x14]
00000334: 40 1C ADDS R0, R0, #1
00000336: 2D D0 BEQ #+0x5A
00000338: 60 69 LDR R0, [R4, #+0x14]
0000033A: 00 68 LDR R0, [R0]
0000033C: 40 1C ADDS R0, R0, #1
0000033E: 29 D0 BEQ #+0x52
00000340: 60 69 LDR R0, [R4, #+0x14]
00000342: 2C E0 B #+0x58
0000039E: 00 F0 A3 FA BL #+0x546
000008E8: 06 4A LDR R2, [PC, #+0x18]
000008EA: 10 60 STR R0, [R2]
000008EC: 01 68 LDR R1, [R0]
000008EE: 81 F3 08 88 MSR MSP, R1
000008F2: 40 68 LDR R0, [R0, #+0x04]
000008F4: 00 47 BX R0
00009A9E: 20 BF WFE
00009AA0: D4 F8 04 01 LDR R0, [R4, #+0x104]
00009AA4: 00 28 CMP R0, #0
00009AA6: FA D0 BEQ #-0x0C
00009A9E: 20 BF WFE
00009AA0: D4 F8 04 01 LDR R0, [R4, #+0x104]
00009AA4: 00 28 CMP R0, #0
00079E18: 06 49 LDR R1, [PC, #+0x18]
00079E1A: 07 4A LDR R2, [PC, #+0x1C]
instruction BreakPoint
| SetBP aaaaa [A|T] [S|H]
A RM mode: 2xxxx | T humb mode: 0xAB S oft|h ard
ClrBP handleID
Example:
Use grep to find startup.main from the LoaD map
grep -A1 .text.startup.main ruuvitag_b/s132/armgcc/_build/ruuvi_firmware.map
.text.startup.main
0x0000000000024aec 0x518 _build/ruuvi_firmware_main.c.o
In j-link:
setBP 24aec
Breakpoint set @ addr 0x00024AEC (Handle = 5)
When breakpoint is encountered a simple J-Link> prompt is presented.
Use moe to determine what happened.
CPU halted due to code breakpoint match.
s executes next instruction.
Display breakpoints (i.e. FPB :(?) mem32 E0002000,10
ARM instructions
| Reset | r[x DelayAfterReset ]
sets ALL regs=0>r
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
>s
000008E4: 06 4B LDR R3, [PC, #+0x18] // first executable
000008E6: 18 47 BX R3
| Set the reset type. | RSetType type
Affects core & peripherals unless noted. See j-Link section 7.9.2 (Ruuvi / nRF52832 is Cortes-M4)
0Normal | via VC_CORERESET and SYSRESETREQ.
- Make sure that the device halts immediately after reset
(before it can execute any instruction of the user application) by setting the VC_CORERESET in the DEMCR .
- Reset the core and peripherals by setting the SYSRESETREQ bit in the AIRCR.
- Wait for the S_RESET_ST bit in the DHCSR to first become high(resetactive)and then
low (reset no longer active) afterwards.
- ClearVC_CORERESET
| 1Core | not recommended. Core only ( via VECTRESET bit, CPU does not start execution)
| 2ResetPin | using RESET pin. CPU does not start execution.
| 3Connect under Reset | connec to target keeping RESETactive.
| 4Halt After BTL | as with 0 executes bootloader.(for LPC1xxx)
| 5Halt Before BTL | as with 8 halts CPU before the bootloader.
| 6Kinetis | via strategy NORMAL. Watchdog disabled after reset
| 7ADI Halt after kernel | halts CPU after the ADI kernel.
| 8Core and Peripherals | via SYSRESETREQ bit only.
| 9LPC1200 | via strategy normal. Watchdog disabled after reset
| 10S3FN60D | via strategy normal. Watchdog disabled after reset
| 11LPC11A | Performs some special handling which is needed by some LPC11A bootloaders.
| | | | | | | | | | | | |
| data WatchPoint | SetWP|ClrWP Addr [R|W] [Data [D-Mask] [A-Mask]]
SetWP 20002da2
Watchpoint set @ addr 0x20002DA2 (Handle = 0x00000004)
When breakpoint is encountered a simple J-Link> prompt is presented.
Use moe to determine what happened.moe
CPU halted due to data breakpoint unit 3 match
| Load *.bin file | loadbin filename.bin, addr
Verfy binary is in memory
| verifybin filename, addr
Wait until CPU halts or timeout exceeded. | WaitHalt TimeoutMs Default 1000
| Wait | Sleep ms
hardware status | st VTref=3.300V
ITarget=0mA
TCK=0 TDI=1 TDO=1 TMS=1 TRES=1 TRST=1
Supported target interface speeds:
- 10 MHz/n, (n=10). = 1000kHz, 909kHz, 833kHz, ...
| hardware info | hwinfo /
HWInfo[00] = Target power is disabled
HWInfo[02] = 0mA (ITarget)
HWInfo[03] = 0mA (ITargetPeak)
HWInfo[04] = 0mA (ITargetPeakOperation)
HWInfo[10] = 0ms (ITargetMaxTime0)
HWInfo[11] = 0ms (ITargetMaxTime1)
HWInfo[12] = 0ms (ITargetMaxTime2)
HWInfo[13] = 0000000
| Write vector catch. | VCatch Value
Unlock a device. | unlock DeviceName
list of supported device names. LM3Sxxx [Auto]
Kinetis
EFM32Gxxx
LPC5460x
nRESET has to be connected
| Test command to visualize printf output from the target device, term using DCC (SEGGER DCC handler running on target)
| CoreSight register
| ReadAP
ReadDP J-Link>readap 2
Reading AP register 1 = 0x20002007 (0 read repetitions needed)
J-Link>readap 2
Reading AP register 2 = 0x00000000 (0 read repetitions needed)
J-Link>readap 3
Reading AP register 3 = 0xA044E7D5 (0 read repetitions needed)
J-Link>readap 4
Reading AP register 4 = 0x23000052 (0 read repetitions needed)
J-Link>readap 5
Reading AP register 5 = 0x20006000 (0 read repetitions needed)
J-Link>readap 6
Reading AP register 6 = 0x00000000 (0 read repetitions needed)
J-Link>readap 7
Reading AP register 7 = 0xF203BEDA (0 read repetitions needed)
J-Link>readap 8
Reading AP register 8 = 0x23000052 (0 read repetitions needed)
J-Link>readap 9
Reading AP register 9 = 0x20003000 (0 read repetitions needed)
J-Link>readap 1
Reading AP register 1 = 0x20002000 (0 read repetitions needed)
J-Link>readap 1
Reading AP register 1 = 0x20004000 (0 read repetitions needed)
J-Link>readap 1
Reading AP register 1 = 0x20002000 (0 read repetitions needed)
J-Link>readap 1
Reading AP register 1 = 0x20000000 (0 read repetitions needed)
J-Link>readap 1
Reading AP register 1 = 0x20006000 (0 read repetitions needed)
J-Link>readap 1
Reading AP register 1 = 0x20004000 (0 read repetitions needed)
J-Link>readap 1
Reading AP register 1 = 0x20002007 (0 read repetitions needed)
J-Link>readap 1
Reading AP register 1 = 0x20005000 (0 read repetitions needed)
First read returns the data of the previous read. An additional read of DP reg 3 is necessary to get the data.
For SWD, data is returned immediately.
For JTAG the data of the previous read is returned.
An additional read of DP reg 3 is necessary to get the data.
WriteAP WriteDP
CoreSight register via SWD.
| SWDReadDP
J-Link>SWDReadDP 1
Read DP register 1 = 0xF0000040
J-Link>SWDReadDP 2
Read DP register 2 = 0xE000ED34
Read DP register 3 = 0xE000ED34
Read DP register 4 = 0xE000ED34
Read DP register 5 = 0x23000052
Read DP register 6 = 0xE000ED34
SWDReadAPM
First read returns the data of the previous read.
An additional read of DP reg 3 is necessary to get the data.
Note: Correct data is returned immediately.
SWDWriteAP SWDWriteDP
Export device names from the DLL internal device list | ExpDevList[XML] Filename
Opening text file for writing... [DLL-list] DLLs
…
"Nordic Semi", "nRF52832_xxAA", "Cortex-M4", { {0x00000000, 0x00080000}, {0x10001000, 0x00001000} }, {0x20000000, 0x00010000}
"Nordic Semi", "nRF52832_xxAB", "Cortex-M4", { {0x00000000, 0x00040000}, {0x10001000, 0x00001000} }, {0x20000000, 0x00008000}
"Nordic Semi", "nRF52840_xxAA", "Cortex-M4", { {0x00000000, 0x00100000}, {0x10001000, 0x00001000} }, {0x20000000, 0x00040000}
"Nordic Semi", "nRF9160", "Cortex-M33", {0x00000000, 0x00100000}, {0x20000000, 0x00040000}
| power trace | PowerTrace LogFile
[ChannelMask RefCountSel]
LogFile: File to store power trace data to
ChannelMask : 32-bit mask to specify what channels shall be enabled
SampleFreq : Sampling frequency in Hz (0 == max)
RefCountSel : 0: No reference count
1: Number of bytes transmitted on SWOERROR: POWERTRACE is not supported by connected J-Link.
| Measure length of scan chain. | ms Scan chain
Identify length of scan chain select register | is
Measure RTCK react time. | mr
Write test words. | wm NumWords
CP15
| Read |Write CP15 | rce | wce Op1, CRn, CRm, Op2 [, data
ICE
| state of the embedded ice macrocell (ICE breaker) | Ice
Read | write Ice reg. | ri | wi RegIndex [, Data(hex)]
| | Trace
| TClear
| TStart | TStop
| TSetSize
| TSetFormat
Regions (and analyze trace buffer) | TSR
Periodic
| | PERConf
| PERStart | PERStop
| PERStat
| PERRead
Read and analyze data | PERShow
File I/O
| Read|Write file to emulator | fread|fwrite
Read and display file from emulator | fshow FileName [Offset [NumBytes]]
Delete file on emulator | fdelete FileName
Display size of file on emulator | fsize FileName
List directory on emulator | flist This File I/O command is not supported by the connected probe
SecureArea Creates/Removes secure area on probe
| Test
| Run go/halt 1000 times | TestHaltGo ................................
Completed. 8420ms required
Run step 1000 times | TestStep
Measure CPU speed. | TestCSpeed [RAMAddr]
Measure download speed into target memory. | TestWSpeed [Addr [Size]]
Measure upload speed from target memory. | TestRSpeed : [Addr [Size] [NumBlocks]]
Measure network speed: download(write)/up(read) | TestNWSpeed: [NumBytes [NumReps]]
TestNDWSpeed: [NumBytes [NumReps]]
JTAG
| Set number of IR/DR bits before ARM device. | Config IRpre, DRpre
Set interface speed. | speed freq|auto|adaptive, e.g. speed 2000, speed a
Read JTAG Id (Host CPU) |
Write JTAG command (IR). | wjc xData
Write JTAG data (DR). | wjd xData64, NumBits(dec)
Write Raw JTAG data. | wjraw NumBits(dec), tms, tdi
RTAP Reset TAP Controller using state machine (111110)
| Reset TA0P Controller (nTRST) | rt
JTAG-Hardware
| Create clock with
TDI = TMS = 0m | c00
c Clock ====== see 16.1.1
| Clear | set | TCK tck0 | 1 test clock input (TCK) provides the clock for the test logic.
Clear | set | TDI 0 | 1 Serial test instructions and data are received by the test logic at test data input
Clear | set | TMS t0 | 1 signal received at test mode select (TMS) is decoded by the TAP controller to control test operations.
Clear | set | TRS Ttrst0 | 1 Test data output (TDO) is the serial output for test instructions and data from the test logic.
Clear | set | RESET r0 |1 (sic?
| Connection
|
Connect ARM Pro or J-Link TCP/IP Server via TCP/IP. | ip ip_addr
Connecting to J-Link via IP...
FAILED: Can not connect to J-Link via TCP/IP (192.168.1.1, port 19020)
| Show/Assign IP address and subnetmask of/to the connected J-Link. | ipaddr Disconnecting from J-Link...O.K.
Disconnecting from J-Link...O.K.
Connecting to J-Link via IP...FAILED: Can not connect to J-Link via TCP/IP. No emulator found.
| Show/Assign network gateway . | gwaddr
Show/Assign network DNS server . | dnsaddr
| | | Configuration
| Switch power supply for target. | power on|off [perm] The connected debug probe does not support this command.
| Read/Write configuration byte | rconf|wconf offset [, data]
rconf 0,80
Total size of config area: 0x100 bytes
00000000 = 00 01 FF FF FF FF FF FF FF FF FF FF FF FF FF FF
00000010 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
00000020 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
00000030 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
00000040 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
00000050 = 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
00000060 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
00000070 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
| Configuration of the connected J-Link. | [show]conf USB-Address: 0
Enum. type: Real-SN is used
KS-Power: Off (Default)
| SWO SoftWare Output
| supported speeds | SWOSpeed Supported speeds:
- 12000 kHz/n, (n>=1). => 12000kHz, 6000kHz, 4000kHz, ...
| | SWOStart| SWOStop
Display SWO status | SWOStat after logging but not displayed vi RTviewerclient1, MAIN:INFO:LEDs init J-Link>SWOStat
0 bytes in host buffer However SWOread showed data and SWOstat
| Read and display SWO data | SWORead
SWOStat
0 bytes in host buffer
J-Link>SWORead
256 bytes read (0 bytes in host buffer)
00000000 = 00 00 00 00 00 00 00 90 00 00 00 00 00 00 00 90
00000010 = 37 00 00 00 A3 59 00 8B 70 A0 16 0C 01 00 00 00
00000020 = 50 62 59 54 FF 7F 00 00 02 00 00 00 00 00 07 00
00000030 = 00 00 00 00 00 00 00 90 00 00 00 00 00 00 00 90
00000040 = 4F 00 00 00 00 00 00 00 10 00 10 00 10 00 00 00
00000050 = 00 00 00 00 00 00 00 00 00 00 00 2C 06 00 16 00 16 00 21 see SWOshow PC
00000060 = 21 00 00 00 40 00 00 00 41 00 00 00 42 00 00 00
00000070 = 43 00 00 00 44 00 00 00 45 00 00 00 46 00 00 00
…
000000F0 = 4F 00 00 00 50 00 00 00 51 00 00 00 52 00 00 00
Read and analyze SWO data | SWOShow
J-Link>SWOShow
256 bytes read (0 bytes in host buffer)
Offset Data Meaning
-----------------------------------------------
001E-0020 16 00 21 PC = 0x00002100
0024-0024 40 Timestamp sync. ITM/DWT (4)
0028-0029 41 00 SWIT(8): 00
002C-002E 42 00 16 SWIT(8): 00 16
0034-0035 01 00 SWIT(0): 00
0038-003A 02 00 00 SWIT(0): 00 00
003C-0040 03 00 00 00 04 SWIT(0): 00 00 00 04
0044-0045 05 00 Event counter ()
0048-.... 06 Unknown packet
| Flush data | SWOFlush
View terminal data | SWOView Receiving SWO data @ 6000 kHz.
Data from stimulus port 0:
-----------------------------------------------
| Calibrate the target current measurement. | calibrate Please disconnect emulator from target.
Press any key to start the calibration...
Calibrating...Emulator calibrated.
Min=-1mA Max=-1mA Avg=-1mA Offs=-1mA...DONE
| Change endian mode | le be little | big
Select a emulator to communicate | selemu [Interface0 Interface1 ...]
list all emulators which are connected to the host. | ShowEmuList [Interface0 Interface1 ...] J-Link[0]: Connection: USB, Serial number: 682930364, ProductName: J-Link OB-SAM3U128-V2-NordicSem
| Set value for VTref | VTREF ValuemV
15.4 Reference voltage (VTref)
VTref is the target reference voltage. used by the J-Link to check if the target has power, to create the logic-level reference for the input comparators and to control the output logic levels to the target. It is normally fed from Vdd of the target board and must not have a series resistor.
In cases where the VTref signal should not be wired to save one more pin / place on the target hardware interface connector (e.g. in production environments), SEGGER offers a special adapter called J-Link Supply Adapter which can be used for such purposes. Further information regarding this, can be found on the SEGGER website ( J-Link supply adapter )
To guarantee proper debug functionality, connect at least on of the GND pins to GND (Pin 4, 6, 8, 10, 12, 14*, 16*, 18*, 20*).
On some models like the J-Link ULTRA, these pins are reserved for firmware extension purposes. They can be left open or connected to GND in normal debug environ- ment. Please do not assume them to be connected to GND inside J-Link.
| log actions | log filename (reformated somewhat)
Shell commands to monitor log :
> taill -f |sed "s/FPS[12][0-9]=0x00,//g; s/FPS[1-9]=0x00,//g"
taill -f |sed "s/FPS[12][0-9]=0x00,//g; s/FPS[1-9]=0x00,//g; s/0x//g; s/JLINK_//; s/0000ms,//g; s/ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 17, 18, 14, 15, 16,/0..18/; s/33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,/33..63/"
tail jl180603
T9C4E9380 2450:057 Step() -- Read from C cache (2 bytes @ 1F81E)
-- Simulated returns 0 (0ms, 777ms total)
T9C4E9380 2450:269 IsHalted() returns TRUE
T9C4E9380 2450:269 GetDeviceFamily() returns 14
T9C4E9380 2450:269 ReadReg(R15 (PC)) returns 1F820
T9C4E9380 2450:269 DisassembleInst(Addr = 1F820)
ReadMemEx(01F820, 2 Bytes, ..., Flags = 0)
-- Read from C cache (2 bytes @ 1F820) - Data: 0 BF returns 2 (0ms, 0ms total)
returns 2
T9C4E9380 2450:269 GetDeviceFamily() returns 14
T9C4E9380 2450:269 ReadMemEx(1F820, 2 Bytes, ..., Flags = 0)
-- Read from C cache (2 bytes @ 1F820) - Data: 0 BF returns 2
T9C4E9380 2450:269 Step()
-- Read from C cache (2 bytes @ 1F820) -- Simulated returns 0 (0ms, 777ms total)
//Read from C cache
halt LOG:
T9C4E9380 4257:596 JLINK_Halt() returns 0 (0007ms, 0438ms total)
T9C4E9380 4257:603 JLINK_GetDeviceFamily() returns 14 ( 0438ms total)
T9C4E9380 4257:603 JLINK_CORE_GetFound() returns 0xE0000FF ( 0438ms total)
T9C4E9380 4257:603 JLINK_GetDeviceFamily() returns 14 ( 0438ms total)
T9C4E9380 4257:603 JLINK_CORE_GetFound() returns 0xE0000FF ( 0438ms total)
T9C4E9380 4257:603 JLINK_GetDebugInfo(0x01 = Unknown)
-- Value=0000001 returns 0 ( 0438ms total)
T9C4E9380 4257:603 JLINK_GetDebugInfo(0x10F = JLINKARM_DEBUG_INFO_HAS_CORTEX_M_SECURITY_EXT_INDEX)
-- Value=0000000 returns 0 ( 0438ms total)
T9C4E9380 4257:603 JLINK_ReadRegs(NumRegs = 28,
Indexes: 0.. 13, 17, 18, 14, 15, 16, 21, 22, 23, 20, 27, 26, 25, 24, 65) not 19, notice order, see below
-- CPU_ReadMem(4 bytes @ 0xE0001004)
-- R0=5027E, R1=7A120, R2=F42400, R3=50000000, R4=F42400, R5=3D09000, R6=80000, R7=20000, R8=0,
R9=0, R10=20000000, R11=0, R12=20007DF8,
R13 (SP)=2000FFF8, MSP=2000FFF8, PSP=0, R14=1F6A1, R15 (PC)=1F776,
XPSR=21000000, APSR=20000000, EPSR=1000000, IPSR=0, CFBP=0, CONTROL=0, FAULTMASK=0, BASEPRI=0, PRIMASK=0,
CycleCnt=9B714FAC returns 0 (1ms, 439ms total)
T9C4E9380 4257:604 JLINK_ReadRegs(NumRegs = 33,
Indexes: 33, …, 64, 32)
-- FPS0=0, …, FPS31=0, FPSCR=0 returns 0 (10ms,449ms total)
g log:
T9C4E9380 4819:214 JLINK_GoEx(MaxEmulInsts = 0, Flags = 01) -- CPU_ReadMem(4 bytes @ E0001000) (3ms, 452ms total)
+=
| list license commands | license
license add Store a custom license on J-Link. Syntax: LicAdd LicName
license erase Erase all custom licenses on J-Link.
license show Show all licenses stored on J-Link.
J-Link>license show
Built-in licenses:
No installable licenses.
| Firmware info | f
Firmware: J-Link OB-SAM3U128-V2-NordicSemi compiled Jan 12 2018 16:05:20
Hardware: V1.00
| Select device | Device
Allows use of the J-Link flash programming as well as using unlimited breakpoints in flash memory.
mandatory For some devices to allow the DLL to perform special handling.
Select target interface. | si SWD | JTAG | ICSP | FINE | …
Select SWD as interface and outputs the JTAG - SWD switching sequence. | SWDSelect
current CPU state | IsHalted CPU is not halted.
| Close connection and quit | qc
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
| | |